Structural and Optoelectronic Properties of Nanostructured Porous Silicon


Team Members: (Dept. of Physics, Indian Institute of Technology Kanpur, India)
Prof. Satyendra Kumar
Dr. Md. Nazrul Islam (Present address: QAED-SRG, Space Applications Centre (ISRO), Ahmedabad, India)
Dr. Sanjay K. Ram
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Under special condition partial electrochemical etching (anodization) of the surface of a crystalline silicon wafer leads to the formation of nanoporous holes in its microstructure, resulting in a large surface to volume ratio in the order of 500m2/cm3. The degree of porosification can be controlled by optimizing the anodization parameters. The material thus achieved, Porous silicon (PS), is a network of nanometer sized Si particles surrounded by voids and space, and is remarkable not only in its ease of fabrication, but also in regards to its properties like complementary metal–oxide–semiconductor (CMOS) compatibility and visible photoluminescence at room temperature.
PS is already being used for a large number of applications which include light-emitting devices like photodetectors and solar cells, and sensing devices. It has also shown great promise either in the form of active layer or in combination with other materials (multilayer). PS is being researched for a whole range of applications like microelectromechanical systems (MEMs), anti-reflective coatings, Bragg reflectors, optical waveguides, chemical and biological sensors.
THEME
The microstructure of porous silicon layers plays a crucial role in determining its opto-electronic properties and possible applications. We have fabricated PS layers with a variety of microstructures having thicknesses ranging from about 1 to 200 microns. Our research has been focused on the microstructural characterization of these PS layers to understand the influence of crystallite size effects, surface effects and surrounding media on the Raman and photoluminescence (PL) spectra. The effect of structural inhomogeneities on the electrical properties and light induced metastabilities were also studied.
In particular, our Raman spectroscopy studies of these PS layers have led to the observation of symmetry forbidden Raman modes at room temperature, depending on the thickness and microstructure. We developed a modified approach to the deconvolution of the Raman scattering data by incorporating the effects of crystallite size distribution (CSD) in the data analysis. In order to understand the PL spectra from silicon nanostructures, a phenomenological model was developed to include both size as well as surface effects. We studied the electron transport properties of these well-characterized porous silicon layers in planar geometry as well as across the c-Si/PS/metal junctions over a wide temperature range from 15 to 450 K.
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Fabrication of Porous Silicon Layers
The PS layers were fabricated by electrochemical anodization of p-Si (100) wafers of 6-10 W.cm resistivity in a Teflon cell using HF (48%) and C2H5OH (99.9%) (1:1 by volume) as electrolyte and a platinum disc as a counter electrode. The schematic view of the experimental setup is shown below.







For a uniform current distribution over the exposed area, an Ohmic back contact was provided by thermal evaporation of Al, followed by annealing at 450° C for 1 hour, both procedures carried out in high vacuum conditions. The wafers were anodized at a constant current density of about 10 mA.cm-2 for times varying from 90 to 120 min under white light illumination, resulting in 30–50 micron thick PS layers. Samples were rinsed in deionized water followed by methanol and subsequently soaked in propanol for few minutes to minimize the structural damage during drying.

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Structural Properties of Porous Silicon
The proper understanding of the PS layer microstructure is vital to the study of the optoelectronic properties of this material. Processing history of PS samples would suggest natural incorporation of disorder and inhomogeneities in the PS network. To understand the microstructure requires measurement of the porosity, thickness, crystallite orientations, sizes and their distribution in PS layers at different length scales. In addition, knowledge of strains in PS layers and PS/c-Si interfaces helps to explain the observed optoelectronic properties.
Scanning Electron Microscopy (SEM)
We used SEM to study the morphology and cross-sections of the PS layers. Our studies show the evolution of the PS layers with anodization time and the effect of changes in different anodization parameters. SEM images of PS layers are shown below which depict our observation of crack initiation in PS layers for shorter anodization times and well-developed cracks and fractured surfaces leading to island formation surrounded by channels for longer anodization times.




X-ray Diffraction (XRD)
The powder XRD studies on the PS layers demonstrated that the remnant porous Si skeleton is single crystalline in nature and has the same orientation as that of the substrate Si. Small lattice misorientation in the crystal planes in XRD spectra increases with increasing thickness of PS layers. Further extensive analyses of XRD data helped us to determine the amount and nature of stress and strain in the PS layers, the mean crystallite sizes and the influence of the anodization parameters on them.



Stress Analysis of Porous Silicon / crystalline Silicon interface
Porous silicon (PS) lattice is expanded from its substrate silicon lattice. This lattice expansion of PS generates lattice mismatch induced compressive strains on PS layers at the PS/substrate interface. The strain relaxes gradually away from the interface resulting the strain gradient from PS/substrate interface to PS surface. The value of average strain depends on the PS layer thickness and becomes the maximum at a certain thickness of PS layer. The change in strain with PS layer thickness is due to the cracking and stress relaxation.




Micro Raman Scattering (RS) Spectroscopy
The major outcomes of our RS studies carried out on PS layers were
- Microstructural characterization of PS layers based on crystallite size distributions with incorporation of CSD in the Raman data analysis methodology.
- Observation of symmetry forbidden Raman modes
The RS data of PS layers reveal spatial inhomogeneities over the anodized surface as well as along the thickness of the samples. These features were explained by correlating the surface morphology from SEM and stress information using XRD. RS spectra show clear evidence of nanocrystalline Si but no distinctive features corresponding to amorphous silicon tissues for all the samples under study.
  • Crystallite Size Distribution (CSD) in Si Nanostructures
Crystallite sizes determined using standard phonon confinement model do not correspond to the sizes obtained by XRD analysis. Further, this model fails to describe the PL spectrum measured on the same spot using quantum confinement models. In order to resolve this problem, a Gaussian distribution in crystallite sizes was explicitly included to calculate the Raman spectra of porous silicon in a model developed by Islam and Kumar (J. Appl. Phys. 98 (2005) 024309). The size distribution (mean size and standard deviation) obtained from fitting the Raman data using our procedure was able to predict the PL accurately in the quantum confinement models. Further, the modified Raman intensity analysis was extended to published reports on directly measured crystallite size distribution and RS data on a variety of Si nanostructures (other than anodized PS also). Our Raman analysis is found to produce good agreement with the mean crystallite sizes obtained from X-ray and high-resolution transmission electron microscopy, especially in the size range of mean crystallite sizes between 2 nm and 5 nm.
The phenomenological model not only is useful to obtain the analytic expression for Raman spectral profile from semiconductor nanostructures having a Gaussian distribution in the crystallite sizes, but also helps us envision in a new light the Raman analysis of such materials where a CSD may be present. The presence of large size dispersion in an ensemble of nanocrystallites was found to give rise to amorphous-like low-frequency tails in the Raman line shapes. Assigning such low-frequency tail in Raman line shapes to a-Si during deconvolution of experimental Raman spectra may lead to a misinterpretation.(Read more on the concept and calculations of bimodal CSD)
(Our studies on Bimodal CSD in microcrystalline silicon)
  • Symmetry Forbidden Raman (SFR) Modes in PS
Enhanced microstructural features in thick PS layers led us to the observation of symmetry forbidden Raman scattering modes at room temperature. Information obtained by XRD and SEM on the structural orientation of the PS layer was used to understand the symmetry violations in Raman selection rules. A combination of various mechanisms such as crystallite size effects, lattice mismatch induced micro-misorientations of crystal planes, and multiple reflections and within the porous silicon nanostructures explains our results

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Photo Luminescence (PL) Spectroscopy
In literature various models have been proposed to understand the origin of room temperature PL from nc-Si structures. None of these PL models can explain all the observed experimental results on PL from PS. But a broad consensus has been reached to quantum confinement effect (QCE), which explains most of experimental PL results at least qualitatively. It is generally accepted that the QCE in the nanocrystallites opens up the band gap as well as relaxes the selection rules for radiative transitions, giving rise to above band gap PL in the visible region for crystallite sizes below ~5 nm. However, QCE alone cannot explain the role of various surface treatments and surrounding media.
In our experiments, the PL peak energy was found to vary about ±0.05eV from the mean value with sampling locations on the same samples. However, if we consider the spatial variation of PL peak energy as an error bar, the PL peak energy averaged over the whole PS layer surface remained almost constant for all samples produced over our entire range of anodization times under same anodization conditions. A free fit to our experimental data using simple QC model yields the unreasonable size parameters.
We developed a phenomenological model to analyze the room temperature PL that includes the surface effects and exciton binding energies along with the crystallite size dependent quantum confinement effects. The optical band gap widening is due to QC effects in nanoparticles. On excitation with high-energy photons, photo carriers are generated inside the crystallites and then some relax non-radiatively to the surface states. Subsequently, the relaxed carriers recombine to the ground states radiatively giving PL. We obtained analytical expressions to model the PL line shapes using normal as well as lognormal crystallite size distributions.
Our microstructural studies have revealed that PS layer contains mixed sized crystallites having two different crystallite size distributions. One CSD for smaller crystallites (L<5>L>10 nm). The former CSD only contributes to PL from PS while the latter has no role to play in luminescent properties of PS layers. The quantum confinement and surface states are equally important for efficient visible PL from PS layers. The QCE in nanocrystallites opens up the band gap in nano-particles increases the oscillator strength of radiative transitions while localized surface states take part in radiative de-excitation of photo-excited carriers. The CSD determined from Raman analysis successfully describes the PL line shapes from PS layers using the hybrid (or unified) PL model consisting of QCE and surface states.
This combined mechanism of PL explained most of the observed PL results from PS layers. Further, experimental data on a variety of nanocrystalline silicon (nc-Si) structures with directly measured crystallite size distribution were analyzed satisfactorily. This showed the importance of localized surface states in predicting the PL data from nc-Si. The model is also found useful in understanding the role of surface passivation and surrounding media on the photoluminescence in porous and nanocrystalline Si.

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Electrical Transport in Porous Silicon
For electrical measurements in coplanar configuration, two rectangular Al pads of 1 mm´5 mm sized with a gap of 0.5 mm while for sandwich configuration circular Al pad of 2 mm diameter were thermally evaporated on top of the freshly prepared porous layers in glancing geometry at an angle of 30° between molecular beam and the sample. This precaution prevents shorting of contact between evaporated metal and the silicon skeleton (especially for thick PS layers). In order to make an intimate contact between PS and Al, samples were annealed at ≈200° C for 45 min. All electrical measurements were carried out in a closed-cycle helium cryostat under dark conditions. Care was taken to avoid any light or thermal induced degradation.



Electrical Transport in Coplanar Configuration
We studied the electrical conductivity of electrochemically etched porous silicon over a wide temperature range from 15K to 450K. Applicability of various transport mechanisms has been critically analyzed. Different current transport mechanisms through thick PS layers were found to be predominant in different temperature zones. While the conductivity data above room temperature shows extended state conduction, lowering the temperature leads to Berthelot type conduction (180 - 280 K). Further, Mott’s (140 - 180 K) and Efros-Shklovskii hopping conduction (below 120 K) are found to be operating in lower temperature ranges. A clear cross-over from Mott to Efros-Shklovskii variable range hopping transport is observed at low temperatures.
Electrical Transport in Sandwich Configuration
In our device structure of Al/c‑Si/PS/Al, measured I‑V characteristics may be governed by either c‑Si/PS heterojunction or PS/Al interface, or both. In our studies, we found Al/PS junctions are non-rectifying and quasi-linear whereas Al/PS/c-Si junctions are weakly rectifying. The rectifying behavior is due to PS/c-Si heterojunction. The diode ideality factor (n) is about 8 for bias ≤0.5 V (about 50 for bias ≤5 V) at forward bias and nearly 1 for ≤0.5 V at reverse bias. As the temperature decreases, n at both forward and reverse biases increases. Different current transport mechanisms are found to be operating across the PS/c-Si junctions under forward and reverse biases.
The barrier height measured from I-V data for ≤0.5 V is higher for forward bias than that for reverse bias. I-V results on PS/c-Si junctions are explained by a multi tunneling-recombination model for forward bias. The current transport mechanism in the reverse bias condition is mainly dominated by the carrier generation recombination in the depletion region formed on the PS side. At higher reverse biases, the reverse current transport is governed by the barrier lowering effects. It is found to behave like a Schottky junction with Fermi level pinned to the defect energy levels at the c-Si/PS interface. The conduction band offset is found to be ≈ 0.1 eV. Based on the detailed analysis of IV data the energy band diagram of the c-Si/PS heterojunction has been presented. Our study provides an easy and useful alternative method of determination of band edge discontinuities in multilayer structures using PS layers.




Persistent Photo Current (PPC) in Porous Silicon
On exposing the samples to infrared filtered white light, PS layers gave an enhanced dark conductivity, known as persistent photo current (PPC), which persisted over long time at 300 K after light illumination was stopped. We studied PPC in details as a function of illumination time, intensity, illumination temperature and sample temperature. We also discovered that PS layers exhibited a decrease in its dark conductivity, similar to Stabler-Wronski effect in a-Si:H, after a prolong illumination. We explained these effects in PS layers by considering inhomogeneities in PS nanostructures.
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